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  VeriLog学习笔记-2020.02.15
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  <time datetime="2020-02-15T11:37:47.000Z" itemprop="datePublished">2020-02-15</time>
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    <a class="article-category-link" href="/categories/%E7%A1%AC%E4%BB%B6/">硬件</a>
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      <p>说明：</p>
<p>开发板使用黑金AX301，主芯片：EP4CE6F17;</p>
<p>学习资料主要是锆石科技、正点原子、黑金的视频、文档、源码</p>
<h2 id="1-流水灯实例"><a href="#1-流水灯实例" class="headerlink" title="1. 流水灯实例"></a>1. 流水灯实例</h2><h3 id="1-1-循环计数法"><a href="#1-1-循环计数法" class="headerlink" title="1.1 循环计数法"></a>1.1 循环计数法</h3><figure class="highlight verilog"><table><tr><td class="gutter"><pre><span class="line">1</span><br><span class="line">2</span><br><span class="line">3</span><br><span class="line">4</span><br><span class="line">5</span><br><span class="line">6</span><br><span class="line">7</span><br><span class="line">8</span><br><span class="line">9</span><br><span class="line">10</span><br><span class="line">11</span><br><span class="line">12</span><br><span class="line">13</span><br><span class="line">14</span><br><span class="line">15</span><br><span class="line">16</span><br><span class="line">17</span><br><span class="line">18</span><br><span class="line">19</span><br><span class="line">20</span><br><span class="line">21</span><br><span class="line">22</span><br><span class="line">23</span><br><span class="line">24</span><br><span class="line">25</span><br><span class="line">26</span><br><span class="line">27</span><br><span class="line">28</span><br><span class="line">29</span><br><span class="line">30</span><br><span class="line">31</span><br><span class="line">32</span><br><span class="line">33</span><br><span class="line">34</span><br><span class="line">35</span><br><span class="line">36</span><br><span class="line">37</span><br><span class="line">38</span><br><span class="line">39</span><br><span class="line">40</span><br><span class="line">41</span><br></pre></td><td class="code"><pre><span class="line"><span class="comment">// 使用定时器循环计数，查看RTL可知用到的基础模块有计时器、加法器、比较器</span></span><br><span class="line"><span class="comment">// 为了便于仿真，计数值都缩小了</span></span><br><span class="line"><span class="meta">`<span class="meta-keyword">timescale</span> 1ns / 1ps			   // 用于仿真： 1ns是时钟脉冲间隔  1ps是最小时间刻度</span></span><br><span class="line"><span class="keyword">module</span> led_test</span><br><span class="line">(</span><br><span class="line">	<span class="keyword">input</span>           clk,           <span class="comment">// system clock 50Mhz on board</span></span><br><span class="line">	<span class="keyword">input</span>           rst_n,         <span class="comment">// reset ,low active</span></span><br><span class="line">	<span class="keyword">output</span> <span class="keyword">reg</span>[<span class="number">3</span>:<span class="number">0</span>] led            <span class="comment">// LED,use for control the LED signal on board</span></span><br><span class="line">);</span><br><span class="line"></span><br><span class="line"><span class="comment">//define the time counter</span></span><br><span class="line"><span class="keyword">reg</span> [<span class="number">31</span>:<span class="number">0</span>]      timer;</span><br><span class="line"></span><br><span class="line"><span class="comment">// cycle counter:from 0 to 4 sec</span></span><br><span class="line"><span class="keyword">always</span>@(<span class="keyword">posedge</span> clk <span class="keyword">or</span> <span class="keyword">negedge</span> rst_n)		<span class="comment">//CLK上升沿和复位下降沿always块运行</span></span><br><span class="line"><span class="keyword">begin</span>										<span class="comment">//rst_n上电瞬间是一个下降沿</span></span><br><span class="line">    <span class="keyword">if</span> (rst_n == <span class="number">1'b0</span>)						<span class="comment">//电路上rst_n实现异步复位</span></span><br><span class="line">		timer &lt;= <span class="number">32'd0</span>;                     <span class="comment">//when the reset signal valid,time counter clearing</span></span><br><span class="line">	<span class="keyword">else</span> <span class="keyword">if</span> (timer == <span class="number">32'd399</span>)      		<span class="comment">//每400个时钟周期计数器归零</span></span><br><span class="line">		timer &lt;= <span class="number">32'd0</span>;                     <span class="comment">//count done,clearing the time counter</span></span><br><span class="line">	<span class="keyword">else</span></span><br><span class="line">		timer &lt;= timer + <span class="number">32'd1</span>;             <span class="comment">//timer counter = timer counter + 1</span></span><br><span class="line"><span class="keyword">end</span></span><br><span class="line"></span><br><span class="line"><span class="comment">// LED control</span></span><br><span class="line"><span class="keyword">always</span>@(<span class="keyword">posedge</span> clk <span class="keyword">or</span> <span class="keyword">negedge</span> rst_n)</span><br><span class="line"><span class="keyword">begin</span></span><br><span class="line">	<span class="keyword">if</span> (rst_n == <span class="number">1'b0</span>)</span><br><span class="line">		led &lt;= <span class="number">4'b0000</span>;             <span class="comment">//when the reset signal active</span></span><br><span class="line">	<span class="keyword">else</span> <span class="keyword">if</span> (timer == <span class="number">32'd99</span>)       <span class="comment">//time counter count to 1st sec,LED1 lighten</span></span><br><span class="line">		led &lt;= <span class="number">4'b0001</span>;</span><br><span class="line">	<span class="keyword">else</span> <span class="keyword">if</span> (timer == <span class="number">32'd199</span>)       <span class="comment">//time counter count to 2nd sec,LED2 lighten</span></span><br><span class="line">		led &lt;= <span class="number">4'b0010</span>;</span><br><span class="line">	<span class="keyword">else</span> <span class="keyword">if</span> (timer == <span class="number">32'd299</span>)      <span class="comment">//time counter count to 3rd sec,LED3 lighten</span></span><br><span class="line">		led &lt;= <span class="number">4'b0100</span>;</span><br><span class="line">	<span class="keyword">else</span> <span class="keyword">if</span> (timer == <span class="number">32'd399</span>)      <span class="comment">//time counter count to 4th sec,LED4 lighten</span></span><br><span class="line">		led[<span class="number">3</span>] &lt;= <span class="number">1'b1</span>;				<span class="comment">//不同的表示方式</span></span><br><span class="line">    <span class="keyword">else</span> </span><br><span class="line">        led &lt;= <span class="number">4'bxxxx</span>;				<span class="comment">//习惯写全避免latch</span></span><br><span class="line"><span class="keyword">end</span></span><br><span class="line"><span class="keyword">endmodule</span></span><br></pre></td></tr></table></figure>
<a id="more"></a>
<h3 id="1-2-移位寄存器法"><a href="#1-2-移位寄存器法" class="headerlink" title="1.2 移位寄存器法"></a>1.2 移位寄存器法</h3><figure class="highlight verilog"><table><tr><td class="gutter"><pre><span class="line">1</span><br><span class="line">2</span><br><span class="line">3</span><br><span class="line">4</span><br><span class="line">5</span><br><span class="line">6</span><br><span class="line">7</span><br><span class="line">8</span><br><span class="line">9</span><br><span class="line">10</span><br><span class="line">11</span><br><span class="line">12</span><br><span class="line">13</span><br><span class="line">14</span><br><span class="line">15</span><br><span class="line">16</span><br><span class="line">17</span><br><span class="line">18</span><br><span class="line">19</span><br><span class="line">20</span><br><span class="line">21</span><br><span class="line">22</span><br><span class="line">23</span><br><span class="line">24</span><br><span class="line">25</span><br><span class="line">26</span><br><span class="line">27</span><br><span class="line">28</span><br><span class="line">29</span><br><span class="line">30</span><br><span class="line">31</span><br><span class="line">32</span><br><span class="line">33</span><br><span class="line">34</span><br><span class="line">35</span><br><span class="line">36</span><br></pre></td><td class="code"><pre><span class="line"><span class="meta">`<span class="meta-keyword">timescale</span> 1ns / 1ps</span></span><br><span class="line"><span class="keyword">module</span> led_test</span><br><span class="line">(</span><br><span class="line">	<span class="keyword">input</span>           clk,           <span class="comment">// system clock 50Mhz on board</span></span><br><span class="line">	<span class="keyword">input</span>           rst_n,         <span class="comment">// reset ,low active，开机上电是先低再高</span></span><br><span class="line">	<span class="keyword">output</span> <span class="keyword">reg</span>[<span class="number">3</span>:<span class="number">0</span>] led            <span class="comment">// LED,use for control the LED signal on board</span></span><br><span class="line">);</span><br><span class="line"></span><br><span class="line"><span class="comment">//define the time counter</span></span><br><span class="line"><span class="keyword">reg</span> [<span class="number">31</span>:<span class="number">0</span>]      timer;</span><br><span class="line"></span><br><span class="line"><span class="comment">// cycle counter:from 0 to 4 sec</span></span><br><span class="line"><span class="keyword">always</span>@(<span class="keyword">posedge</span> clk <span class="keyword">or</span> <span class="keyword">negedge</span> rst_n)</span><br><span class="line"><span class="keyword">begin</span></span><br><span class="line">	<span class="keyword">if</span> (rst_n == <span class="number">1'b0</span>)</span><br><span class="line">		timer &lt;= <span class="number">32'd0</span>;               <span class="comment">//when the reset signal valid,time counter clearing  开机初始化过程</span></span><br><span class="line">	<span class="keyword">else</span> <span class="keyword">if</span> (timer &lt; <span class="number">32'd50_000_000</span>)  <span class="comment">//4 seconds count(50M*4-1=199999999)</span></span><br><span class="line"></span><br><span class="line">		timer &lt;= timer + <span class="number">32'd1</span>;      <span class="comment">//timer counter = timer counter + 1</span></span><br><span class="line">	<span class="keyword">else</span></span><br><span class="line">		timer &lt;= <span class="number">32'd0</span>;            <span class="comment">//count done,clearing the time counter   计数每1s归零</span></span><br><span class="line"><span class="keyword">end</span></span><br><span class="line">    </span><br><span class="line"><span class="keyword">always</span>@(<span class="keyword">posedge</span> clk <span class="keyword">or</span> <span class="keyword">negedge</span> rst_n)</span><br><span class="line"><span class="keyword">begin</span></span><br><span class="line"></span><br><span class="line">    <span class="keyword">if</span> (rst_n == <span class="number">1'b0</span>)</span><br><span class="line">        led &lt;= <span class="number">4'b0001</span>;							<span class="comment">// 此处必须有一位为1</span></span><br><span class="line">    <span class="keyword">else</span> <span class="keyword">if</span>(timer == <span class="number">32'd50_000_000</span>) </span><br><span class="line">        led[<span class="number">3</span>:<span class="number">0</span>] &lt;= &#123;led[<span class="number">2</span>:<span class="number">0</span>],led[<span class="number">3</span>]&#125;;			<span class="comment">// 使用移位方式实现流水灯</span></span><br><span class="line">    <span class="keyword">else</span></span><br><span class="line">        led &lt;= led;		</span><br><span class="line"><span class="keyword">end</span></span><br><span class="line"></span><br><span class="line"></span><br><span class="line"><span class="keyword">endmodule</span></span><br></pre></td></tr></table></figure>
<h3 id="1-3-激励程序"><a href="#1-3-激励程序" class="headerlink" title="1.3 激励程序"></a>1.3 激励程序</h3><figure class="highlight verilog"><table><tr><td class="gutter"><pre><span class="line">1</span><br><span class="line">2</span><br><span class="line">3</span><br><span class="line">4</span><br><span class="line">5</span><br><span class="line">6</span><br><span class="line">7</span><br><span class="line">8</span><br><span class="line">9</span><br><span class="line">10</span><br><span class="line">11</span><br><span class="line">12</span><br><span class="line">13</span><br><span class="line">14</span><br><span class="line">15</span><br><span class="line">16</span><br><span class="line">17</span><br><span class="line">18</span><br><span class="line">19</span><br><span class="line">20</span><br><span class="line">21</span><br><span class="line">22</span><br><span class="line">23</span><br></pre></td><td class="code"><pre><span class="line"><span class="meta">`<span class="meta-keyword">timescale</span> 1ns/1ps</span></span><br><span class="line"><span class="keyword">module</span> led_test_tb;</span><br><span class="line"><span class="keyword">reg</span> clk;</span><br><span class="line"><span class="keyword">reg</span> rst_n;</span><br><span class="line"><span class="keyword">wire</span>[<span class="number">3</span>:<span class="number">0</span>] led;</span><br><span class="line">    </span><br><span class="line"><span class="keyword">initial</span>							<span class="comment">//initial是不能综合的代码，只用于tb中</span></span><br><span class="line"><span class="keyword">begin</span></span><br><span class="line">	clk = <span class="number">1'b0</span>;</span><br><span class="line">	rst_n = <span class="number">1'b0</span>;</span><br><span class="line">	#<span class="number">100</span> rst_n = <span class="number">1'b1</span>;	</span><br><span class="line"><span class="keyword">end</span></span><br><span class="line">    </span><br><span class="line"><span class="keyword">always</span>#<span class="number">10</span> clk = ~clk;			<span class="comment">//50Mhz 间隔10ns翻转一次</span></span><br><span class="line">    </span><br><span class="line">led_test dut</span><br><span class="line">(</span><br><span class="line">	<span class="variable">.clk</span>           (clk),		<span class="comment">// 输入时钟: 50Mhz</span></span><br><span class="line">	<span class="variable">.rst_n</span>         (rst_n),		<span class="comment">// 输入复位按键</span></span><br><span class="line">	<span class="variable">.led</span>           (led)		<span class="comment">// 输出LED灯,用于控制四个LED(LED0~LED3)</span></span><br><span class="line">);</span><br><span class="line">    </span><br><span class="line"><span class="keyword">endmodule</span></span><br></pre></td></tr></table></figure>



<h2 id="2-三人表决器实例"><a href="#2-三人表决器实例" class="headerlink" title="2. 三人表决器实例"></a>2. 三人表决器实例</h2><h3 id="2-1-结构化描述方式"><a href="#2-1-结构化描述方式" class="headerlink" title="2.1  结构化描述方式"></a>2.1  结构化描述方式</h3><figure class="highlight verilog"><table><tr><td class="gutter"><pre><span class="line">1</span><br><span class="line">2</span><br><span class="line">3</span><br><span class="line">4</span><br><span class="line">5</span><br><span class="line">6</span><br><span class="line">7</span><br><span class="line">8</span><br><span class="line">9</span><br><span class="line">10</span><br><span class="line">11</span><br><span class="line">12</span><br><span class="line">13</span><br><span class="line">14</span><br><span class="line">15</span><br><span class="line">16</span><br><span class="line">17</span><br><span class="line">18</span><br><span class="line">19</span><br></pre></td><td class="code"><pre><span class="line"><span class="keyword">module</span> threeChoice</span><br><span class="line">(</span><br><span class="line">	A, B, C,</span><br><span class="line">	Y</span><br><span class="line"></span><br><span class="line">);</span><br><span class="line"></span><br><span class="line"><span class="keyword">input</span> A, B, C;</span><br><span class="line"><span class="keyword">output</span> Y;</span><br><span class="line"></span><br><span class="line"><span class="keyword">wire</span> AB, BC, AC;</span><br><span class="line"></span><br><span class="line"><span class="keyword">and</span> U1(AB, A, B);		<span class="comment">// U？表示操作，不是变量，不能运算</span></span><br><span class="line"><span class="keyword">and</span> U2(BC, B, C);</span><br><span class="line"><span class="keyword">and</span> U3(AC, A, C);</span><br><span class="line"></span><br><span class="line"><span class="keyword">or</span> U4(Y, AB, BC, AC);</span><br><span class="line"></span><br><span class="line"><span class="keyword">endmodule</span></span><br></pre></td></tr></table></figure>
<p>查看RTL视图，标准的门级电路</p>
<p><img src="/2020/ck6r6m2cs000fl0rh5tg3236z/1581742208958.png" alt="1581742208958"></p>
<p>查看MapView，对应到芯片资源，实现方程变为： Y=A(B+C)+BC</p>
<p><img src="/2020/ck6r6m2cs000fl0rh5tg3236z/1581742340779.png" alt="1581742340779"></p>
<h3 id="2-2-数据流描述方式"><a href="#2-2-数据流描述方式" class="headerlink" title="2.2 数据流描述方式"></a>2.2 数据流描述方式</h3><figure class="highlight verilog"><table><tr><td class="gutter"><pre><span class="line">1</span><br><span class="line">2</span><br><span class="line">3</span><br><span class="line">4</span><br><span class="line">5</span><br><span class="line">6</span><br><span class="line">7</span><br><span class="line">8</span><br><span class="line">9</span><br></pre></td><td class="code"><pre><span class="line"><span class="comment">// 3人表决器- 数据流描述方式</span></span><br><span class="line"><span class="keyword">module</span> threeChoice(A, B, C, Y);</span><br><span class="line"></span><br><span class="line"><span class="keyword">input</span> A, B, C;</span><br><span class="line"><span class="keyword">output</span> Y;</span><br><span class="line">	<span class="comment">// 此处用位与或、逻辑与或，结果一样</span></span><br><span class="line">    <span class="keyword">assign</span> Y = (A&amp;B)|(A&amp;C)|(B&amp;C);	<span class="comment">// (A&amp;B)+(A&amp;C)+(B&amp;C)是错误的，“+”不是逻辑运算</span></span><br><span class="line"></span><br><span class="line"><span class="keyword">endmodule</span></span><br></pre></td></tr></table></figure>
<p>RTL和Map后的结果与2.1相同</p>
<h3 id="2-3-行为级的描述方式"><a href="#2-3-行为级的描述方式" class="headerlink" title="2.3 行为级的描述方式"></a>2.3 行为级的描述方式</h3><figure class="highlight verilog"><table><tr><td class="gutter"><pre><span class="line">1</span><br><span class="line">2</span><br><span class="line">3</span><br><span class="line">4</span><br><span class="line">5</span><br><span class="line">6</span><br><span class="line">7</span><br><span class="line">8</span><br><span class="line">9</span><br><span class="line">10</span><br><span class="line">11</span><br><span class="line">12</span><br><span class="line">13</span><br><span class="line">14</span><br><span class="line">15</span><br><span class="line">16</span><br><span class="line">17</span><br><span class="line">18</span><br><span class="line">19</span><br><span class="line">20</span><br><span class="line">21</span><br><span class="line">22</span><br><span class="line">23</span><br><span class="line">24</span><br><span class="line">25</span><br><span class="line">26</span><br><span class="line">27</span><br><span class="line">28</span><br><span class="line">29</span><br><span class="line">30</span><br><span class="line">31</span><br></pre></td><td class="code"><pre><span class="line"><span class="comment">// 3人表决器- 行为级的描述方式</span></span><br><span class="line"><span class="keyword">module</span> threeChoice</span><br><span class="line">(</span><br><span class="line">	A, B, C,</span><br><span class="line">	Y</span><br><span class="line">);</span><br><span class="line"></span><br><span class="line"><span class="keyword">input</span> A, B, C;</span><br><span class="line"><span class="keyword">output</span> Y;</span><br><span class="line"></span><br><span class="line"><span class="keyword">always</span> @ (A, B, C)</span><br><span class="line"><span class="keyword">begin</span></span><br><span class="line">	</span><br><span class="line">	<span class="keyword">case</span> (&#123;A, B, C&#125;)		<span class="comment">// &#123;A, B, C&#125;表示总线，可改为A, B, C</span></span><br><span class="line">		<span class="number">3'd0</span>: Y = <span class="number">1'b0</span>;</span><br><span class="line">		<span class="number">3'd1</span>: Y = <span class="number">1'b0</span>;</span><br><span class="line">		<span class="number">3'd2</span>: Y = <span class="number">1'b0</span>;		<span class="comment">// 3'd2只是数据的另外一种表示</span></span><br><span class="line">		<span class="number">3'b011</span>: Y = <span class="number">1'b1</span>;</span><br><span class="line">		<span class="number">3'b100</span>: Y = <span class="number">1'b0</span>;</span><br><span class="line">		<span class="number">3'b101</span>: Y = <span class="number">1'b1</span>;</span><br><span class="line">		<span class="number">3'b110</span>: Y = <span class="number">1'b1</span>;</span><br><span class="line">		<span class="number">3'b111</span>: Y = <span class="number">1'b1</span>;</span><br><span class="line"></span><br><span class="line">		<span class="keyword">default</span>: Y = <span class="number">1'bx</span>;</span><br><span class="line"></span><br><span class="line"></span><br><span class="line">	<span class="keyword">endcase</span></span><br><span class="line"></span><br><span class="line"><span class="keyword">end</span></span><br><span class="line"></span><br><span class="line"><span class="keyword">endmodule</span></span><br></pre></td></tr></table></figure>

<p>RTL视图，基础模块变成了译码器</p>
<p><img src="/2020/ck6r6m2cs000fl0rh5tg3236z/1581742490360.png" alt="1581742490360"></p>
<p>虽然RTL结果有所不同，但是最终布线结果依然一样：</p>
<p><img src="/2020/ck6r6m2cs000fl0rh5tg3236z/1581742587500.png" alt="1581742587500"></p>
<p>U4~0块就是2与门+2或门的组合逻辑</p>
<h3 id="2-4-激励程序"><a href="#2-4-激励程序" class="headerlink" title="2.4 激励程序"></a>2.4 激励程序</h3><p>未使用Random随机生成输入波形</p>
<figure class="highlight verilog"><table><tr><td class="gutter"><pre><span class="line">1</span><br><span class="line">2</span><br><span class="line">3</span><br><span class="line">4</span><br><span class="line">5</span><br><span class="line">6</span><br><span class="line">7</span><br><span class="line">8</span><br><span class="line">9</span><br><span class="line">10</span><br><span class="line">11</span><br><span class="line">12</span><br><span class="line">13</span><br><span class="line">14</span><br><span class="line">15</span><br><span class="line">16</span><br><span class="line">17</span><br><span class="line">18</span><br><span class="line">19</span><br><span class="line">20</span><br><span class="line">21</span><br><span class="line">22</span><br><span class="line">23</span><br><span class="line">24</span><br><span class="line">25</span><br><span class="line">26</span><br><span class="line">27</span><br><span class="line">28</span><br><span class="line">29</span><br><span class="line">30</span><br><span class="line">31</span><br><span class="line">32</span><br><span class="line">33</span><br><span class="line">34</span><br><span class="line">35</span><br><span class="line">36</span><br><span class="line">37</span><br><span class="line">38</span><br><span class="line">39</span><br><span class="line">40</span><br><span class="line">41</span><br><span class="line">42</span><br><span class="line">43</span><br><span class="line">44</span><br></pre></td><td class="code"><pre><span class="line"><span class="meta">`<span class="meta-keyword">timescale</span> 1 ps/ 1 ps</span></span><br><span class="line"><span class="keyword">module</span> threeChoice_vlg_tst();</span><br><span class="line"><span class="comment">// constants                                           </span></span><br><span class="line"></span><br><span class="line"><span class="comment">// test vector input registers</span></span><br><span class="line"><span class="keyword">reg</span> A;</span><br><span class="line"><span class="keyword">reg</span> B;</span><br><span class="line"><span class="keyword">reg</span> C;</span><br><span class="line"><span class="comment">// wires                                               </span></span><br><span class="line"><span class="keyword">wire</span> Y;</span><br><span class="line"></span><br><span class="line"><span class="comment">// assign statements (if any)                          </span></span><br><span class="line">threeChoice i1 (</span><br><span class="line"><span class="comment">// port map - connection between master ports and signals/registers   </span></span><br><span class="line">	<span class="variable">.A</span>(A),</span><br><span class="line">	<span class="variable">.B</span>(B),</span><br><span class="line">	<span class="variable">.C</span>(C),</span><br><span class="line">	<span class="variable">.Y</span>(Y)</span><br><span class="line">);</span><br><span class="line"></span><br><span class="line"><span class="keyword">initial</span></span><br><span class="line"><span class="keyword">begin</span></span><br><span class="line">	<span class="built_in">$monitor</span>(<span class="built_in">$time</span>, <span class="string">", when %b, Y value = %b\n"</span>, &#123;A, B, C&#125;, Y);		<span class="comment">// 打印信息</span></span><br><span class="line">	<span class="comment">//激励信号产生</span></span><br><span class="line">	A = <span class="number">1'b0</span>; B = <span class="number">1'b0</span>; C = <span class="number">1'b0</span>;</span><br><span class="line">	<span class="comment">//等待 1000ps = 1ns</span></span><br><span class="line">	#<span class="number">1000</span>; A = <span class="number">1'b0</span>; B = <span class="number">1'b0</span>; C = <span class="number">1'b1</span>; </span><br><span class="line">	<span class="comment">//等待 1000ps</span></span><br><span class="line">	#<span class="number">1000</span>; A = <span class="number">1'b0</span>; B = <span class="number">1'b1</span>; C = <span class="number">1'b0</span>; </span><br><span class="line">	<span class="comment">//等待 1000ps</span></span><br><span class="line">	#<span class="number">1000</span>; A = <span class="number">1'b0</span>; B = <span class="number">1'b1</span>; C = <span class="number">1'b1</span>;</span><br><span class="line">	<span class="comment">//等待 1000ps</span></span><br><span class="line">	#<span class="number">1000</span>; A = <span class="number">1'b1</span>; B = <span class="number">1'b0</span>; C = <span class="number">1'b0</span>; </span><br><span class="line">	<span class="comment">//等待 1000ps</span></span><br><span class="line">	#<span class="number">1000</span>; A = <span class="number">1'b1</span>; B = <span class="number">1'b0</span>; C = <span class="number">1'b1</span>; </span><br><span class="line">	<span class="comment">//等待 1000ps</span></span><br><span class="line">	#<span class="number">1000</span>; A = <span class="number">1'b1</span>; B = <span class="number">1'b1</span>; C = <span class="number">1'b0</span>; </span><br><span class="line">	<span class="comment">//等待 1000ps</span></span><br><span class="line">	#<span class="number">1000</span>; A = <span class="number">1'b1</span>; B = <span class="number">1'b1</span>; C = <span class="number">1'b1</span>; </span><br><span class="line"></span><br><span class="line">	#<span class="number">1000</span>;</span><br><span class="line">	<span class="built_in">$stop</span>;	</span><br><span class="line"><span class="keyword">end</span>                                              </span><br><span class="line"><span class="keyword">endmodule</span></span><br></pre></td></tr></table></figure>

<h3 id="2-5-实机试练"><a href="#2-5-实机试练" class="headerlink" title="2.5 实机试练"></a>2.5 实机试练</h3><p>配合按键、数码管实现一个简单的三人表决器，功能描述：</p>
<pre><code>1. 3键盘输入表决判断，按下表示同意

2. 一个LED输出表决结果，亮表示结果为同意

3. 还有3个LED即时显示键盘的动作，按下则亮

4. 一个数码管用来显示当前同意的人数</code></pre><p>要求：只使用组合逻辑实现</p>
<figure class="highlight verilog"><table><tr><td class="gutter"><pre><span class="line">1</span><br><span class="line">2</span><br><span class="line">3</span><br><span class="line">4</span><br><span class="line">5</span><br><span class="line">6</span><br><span class="line">7</span><br><span class="line">8</span><br><span class="line">9</span><br><span class="line">10</span><br><span class="line">11</span><br><span class="line">12</span><br><span class="line">13</span><br><span class="line">14</span><br><span class="line">15</span><br><span class="line">16</span><br><span class="line">17</span><br><span class="line">18</span><br><span class="line">19</span><br><span class="line">20</span><br><span class="line">21</span><br><span class="line">22</span><br><span class="line">23</span><br><span class="line">24</span><br><span class="line">25</span><br><span class="line">26</span><br><span class="line">27</span><br><span class="line">28</span><br><span class="line">29</span><br><span class="line">30</span><br><span class="line">31</span><br><span class="line">32</span><br><span class="line">33</span><br><span class="line">34</span><br><span class="line">35</span><br><span class="line">36</span><br><span class="line">37</span><br><span class="line">38</span><br><span class="line">39</span><br><span class="line">40</span><br><span class="line">41</span><br><span class="line">42</span><br><span class="line">43</span><br><span class="line">44</span><br><span class="line">45</span><br><span class="line">46</span><br><span class="line">47</span><br><span class="line">48</span><br><span class="line">49</span><br><span class="line">50</span><br><span class="line">51</span><br><span class="line">52</span><br><span class="line">53</span><br></pre></td><td class="code"><pre><span class="line"><span class="keyword">module</span> threeChoice</span><br><span class="line">(</span><br><span class="line">	<span class="comment">// 输入</span></span><br><span class="line">	KEY1, KEY2, KEY3,					<span class="comment">// 可以使用总线形式KEY[2:0]</span></span><br><span class="line">	<span class="comment">// 输出</span></span><br><span class="line">	LED0, LED1, LED2, LED3,</span><br><span class="line">	<span class="comment">// 数码管控制管脚输出</span></span><br><span class="line">	SEG_EN, SEG_DATA</span><br><span class="line">);</span><br><span class="line">    </span><br><span class="line"><span class="comment">// 变量声明</span></span><br><span class="line"><span class="keyword">input</span> KEY1, KEY2, KEY3;</span><br><span class="line"></span><br><span class="line"><span class="keyword">output</span> 		LED0, LED1, LED2;			<span class="comment">// 用于显示按键是否按下</span></span><br><span class="line"><span class="keyword">output</span> 		LED3;						<span class="comment">// 用于输出表决结果</span></span><br><span class="line"><span class="keyword">output</span> 		SEG_EN;						<span class="comment">// 一个数码管的使能（段选）</span></span><br><span class="line"><span class="keyword">output</span> <span class="keyword">reg</span> 	[<span class="number">7</span>:<span class="number">0</span>] SEG_DATA;</span><br><span class="line"></span><br><span class="line"><span class="keyword">reg</span> Y;		<span class="comment">// 中间变量</span></span><br><span class="line"></span><br><span class="line"><span class="comment">// 常量声明</span></span><br><span class="line"><span class="keyword">parameter</span>	SEG_NUM0 = <span class="number">8'b1100_0000</span>,  	<span class="comment">//数字 0</span></span><br><span class="line">			SEG_NUM1 = <span class="number">8'b1111_1001</span>, 	<span class="comment">//数字 1</span></span><br><span class="line">			SEG_NUM2 = <span class="number">8'b1010_0100</span>,  	<span class="comment">//数字 2</span></span><br><span class="line">			SEG_NUM3 = <span class="number">8'hb0</span>;  			<span class="comment">//数字 3</span></span><br><span class="line"></span><br><span class="line"></span><br><span class="line"><span class="keyword">assign</span> LED0 = ~KEY1;</span><br><span class="line"><span class="keyword">assign</span> LED1 = ~KEY2;</span><br><span class="line"><span class="keyword">assign</span> LED2 = ~KEY3;</span><br><span class="line"></span><br><span class="line"><span class="keyword">assign</span> LED3 = Y;</span><br><span class="line"></span><br><span class="line"><span class="keyword">assign</span> SEG_EN = <span class="number">1'b0</span>;			<span class="comment">// 使能一个数码管</span></span><br><span class="line"></span><br><span class="line"><span class="keyword">always</span> @ (*)					<span class="comment">// @ (*)表示任意输入出现变化</span></span><br><span class="line"><span class="keyword">begin</span></span><br><span class="line">	</span><br><span class="line">	<span class="keyword">case</span> (&#123;~KEY1, ~KEY2, ~KEY3&#125;)</span><br><span class="line">		<span class="number">3'b000</span>: <span class="keyword">begin</span> Y = <span class="number">1'b0</span>; SEG_DATA = SEG_NUM0; <span class="keyword">end</span></span><br><span class="line">		<span class="number">3'b001</span>: <span class="keyword">begin</span> Y = <span class="number">1'b0</span>; SEG_DATA = SEG_NUM1; <span class="keyword">end</span></span><br><span class="line">		<span class="number">3'b010</span>: <span class="keyword">begin</span> Y = <span class="number">1'b0</span>; SEG_DATA = SEG_NUM1; <span class="keyword">end</span></span><br><span class="line">		<span class="number">3'b011</span>: <span class="keyword">begin</span> Y = <span class="number">1'b1</span>; SEG_DATA = SEG_NUM2; <span class="keyword">end</span></span><br><span class="line">		<span class="number">3'b100</span>: <span class="keyword">begin</span> Y = <span class="number">1'b0</span>; SEG_DATA = SEG_NUM1; <span class="keyword">end</span></span><br><span class="line">		<span class="number">3'b101</span>: <span class="keyword">begin</span> Y = <span class="number">1'b1</span>; SEG_DATA = SEG_NUM2; <span class="keyword">end</span></span><br><span class="line">		<span class="number">3'b110</span>: <span class="keyword">begin</span> Y = <span class="number">1'b1</span>; SEG_DATA = SEG_NUM2; <span class="keyword">end</span></span><br><span class="line">		<span class="number">3'b111</span>: <span class="keyword">begin</span> Y = <span class="number">1'b1</span>; SEG_DATA = SEG_NUM3; <span class="keyword">end</span></span><br><span class="line">		<span class="keyword">default</span>: Y = <span class="number">1'bx</span>;</span><br><span class="line">	<span class="keyword">endcase</span></span><br><span class="line"></span><br><span class="line"><span class="keyword">end</span></span><br><span class="line"></span><br><span class="line"><span class="keyword">endmodule</span></span><br></pre></td></tr></table></figure>

<p>RTL结果，可知没有时序电路：</p>
<p><img src="/2020/ck6r6m2cs000fl0rh5tg3236z/1581750372395.png" alt="1581750372395"></p>
<p>布局布线后，依然能看到 “Y=A(B+C)+BC”电路：</p>
<p><img src="/2020/ck6r6m2cs000fl0rh5tg3236z/1581758106466.png" alt="1581758106466"></p>
<p>实机调试：</p>
<p><img src="/2020/ck6r6m2cs000fl0rh5tg3236z/1581751351239.png" alt="1581751351239"></p>

      
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